After performing arithmetical or logical operations, the result is stored here
General-purpose register that is capable of storing 16-bit data (B - 8-bit) (C - 8-bit)
General-purpose register that is capable of storing 16-bit data (D - 8-bit) (E - 8-bit)
Usually used to store a memory address Ex. (00 - H) (36 - L). It also creates a hypothetical register labeled as 'M'
Note: The general purpose registers in 8085 processors are B, C, D, E, H and L.
Each register can hold 8-bit data.
They can work in pairs such as B-C, D-E and H-L to store 16-bit data.
The H-L pair works as a memory pointer.
S (Sign Flag)
If MSB bit = 0 then the number is positive, else it is negative.
Z (Zero Flag)
If an operation performed in A results 0 value of entire 8-bits then zero flag is set, else it resets.
AC (Auxiliary Carry Flag)
If an operation performed in A generates the carry from lower nibble (D0 to D3) to upper nibble (D4 to D7) AC flag is set, else it resets.
P (Parity Flag)
If the result contains even no. of ones this flag is set and for odd no. of ones this flag is reset.
CY (Carry Flag)
If an operation performed in A generates the carry from D7 to next stage then CY flag is set, else it is reset.
Note – The Auxiliary Carry flag register in 8085 is the only flag not accessible by the user.
PC (Program Counter)
Stores the address of the next instruction to be executed.
SP (Stack Pointer)
Stack pointer maintains the address of the last byte that is entered into stack.
PSW (Program Status Word)
It combines the Accumulator register with all the flag registers in a 16-bit format
Note: A stack is nothing but a portion of RAM (Random access memory).
Each time when the data is loaded into stack, Stack pointer gets decremented.
Conversely it is incremented when data is retrieved from stack.
A stack is treated as a 16-bit entry and it consumes 2 locations from a memory for 1 entry.
A stack requires a 16-bit register to be pointed to.
Opcode Fetch Machine Cycle
4T or 6T
Memory Read Machine Cycle
Memory Write Machine Cycle
I/O Read Machine Cycle
I/O Write Machine Cycle
Most of the time, it's just 4T for the Opcode Fetch, there are only a few commands that require 6T
In this addressing mode, the address of the operand (data) is given in the instruction itself.
In register addressing mode, the operand is in one of the general purpose registers. The opcode specifies the address of the register(s) in addition to the operation to be performed.
Register Indirect Addressing
In Register Indirect mode of addressing, the address of the operand is specified by a register pair.
In this addressing mode, the operand is specified within the instruction itself.
There are certain instructions which operate on the content of the accumulator. Such instructions do not require the address of the operand.
1. Direct Addressing:
2. Register Addressing:
MOV A, B
3. Register Indirect Addressing
LXI H, 2500 H
MOV A, M
4. Immediate Addressing
LXI H, 2500
5. Implicit Addressing
CMA, RAL, RAR, etc.